The present invention relates to a line spectrum pair voice synthesizer (to be referred to as an LSP speech synthesizer hereinafter) and, more particularly, to a compact LSP speech synthesizer which does not degrade voice sound quality.
Conventional speech synthesizers include a linear predictive coding (LPC) speech synthesizer and a partial correlation (PARCOR) speech synthesizer. Each of these speech synthesizers includes: a memory for storing parameters for creating speech sound waves and speech parameter information, such as speech segment data; a speech synthesizer for producing speech sound waves based on the speech parameter information and for converting them into sounds; a controller for reading out the speech parameter information and for driving the speech synthesizer on the basis of commands given thereto.
In the LPC speech synthesizer, speech is mathematically patterned using the principle of linear prediction, and highly precise speech synthesis is performed by using an analytic method which constantly yields a stable solution. However, if the LPC speech synthesizer is applied to speech information compression/transmission, speech synthesis characteristics of the filter are unstable when speech parameters are encoded to low-bit data. In order to improve upon the above drawback and utilize linear prediction for further practicability, a PARCOR speech synthesizer was developed.
In the PARCOR speech synthesizer, speech information for each second can be compressed into data of 4,800 to 9,600 bits. However, if speech information is less than 2,400 bit data/second, speech synthesis becomes abruptly unclear and unnatural.
In order to eliminate this drawback of the PARCOR system, an analysis theory using the LSP (Line Spectrum Pair) system was proposed. The LSP speech synthesis method was proposed based on this analysis theory. Immediately after the proposal of the LSP synthesis method, a one-chip LSP speech synthesizer LSI was developed.
In the LSP system, speech synthesis can be performed using a small amount of speech information and can maintain speech sound quality above a given level. However, since a conventional LSP speech synthesizer has a digital filter consisting of a shift register of about 300 bits, four series adders, a subtractor, and a pipeline multiplier, the synthesizer is large in size. In the pipeline multiplier, a master clock pulse frequency is 921.6 kHz (6.4 kHz.times.144) if 144 clock pulses are used for one sampled value and a sampling frequency is 6.4 kHz. Such a high master clock pulse frequency results in high power consumption. Therefore, it is desirable that an LSP system use a lower-frequency master clock pulse.